Biomedical subjects

Rahul Sarpeshkar

Publications and source records attributed to Rahul Sarpeshkar.

3 recordsLinked to original sources

PubMed2006

Fast cochlear amplification with slow outer hair cells.

In mammalian cochleas, outer hair cells (OHCs) produce mechanical amplification over the entire audio-frequency range (up to 100 kHz). Under the 'somatic electro-motility' theory, mechano-electrical transduction modulates the OHC transmembrane potential, driving an OHC mechanical response which generates cycle-by-cycle mechanical amplification. Yet, though the OHC motor responds up to at least 70 kHz, the OHC membrane RC time constant (in vitro upper limit approximately 1000 Hz) reduces the potential driving the motor at high frequencies. Thus, the mechanism for high-frequency amplification with slow OHCs has been a two-decade-long mystery. Previous models fit to experimental data incorporated slow OHCs but did not explain how the OHC time constant limitation is overcome. Our key contribution is showing that negative feedback due to organ-of-Corti functional anatomy with adequate OHC gain significantly extends closed-loop system bandwidth and increases resonant gain. The OHC gain-bandwidth product, not just bandwidth, determines if high-frequency amplification is possible. Due to the cochlea's collective traveling-wave architecture, a single OHC's gain need not be great. OHC piezoelectricity increases the effectiveness of negative-feedback but is not essential for amplification. Thus, emergent closed-loop network dynamics differ significantly from open-loop component dynamics, a generally important principle in complex biological systems.

Animals↗

PubMed2005

An ultra-low-power programmable analog bionic ear processor.

We report a programmable analog bionic ear (cochlear implant) processor in a 1.5-microm BiCMOS technology with a power consumption of 211 microW and 77-dB dynamic range of operation. The 9.58 mm x 9.23 mm processor chip runs on a 2.8 V supply and has a power consumption that is lower than state-of-the-art analog-to-digital (A/D)-then-DSP designs by a factor of 25. It is suitable for use in fully implanted cochlear-implant systems of the future which require decades of operation on a 100-mAh rechargeable battery with a finite number of charge-discharge cycles. It may also be used as an ultra-low-power spectrum-analysis front end in portable speech-recognition systems. The power consumption of the processor includes the 100 microW power consumption of a JFET-buffered electret microphone and an associated on-chip microphone front end. An automatic gain control circuit compresses the 77-dB input dynamic range into a narrower internal dynamic range (IDR) of 57 dB at which each of the 16 spectral channels of the processor operate. The output bits of the processor are scanned and reported off chip in a format suitable for continuous-interleaved-sampling stimulation of electrodes. Power-supply-immune biasing circuits ensure robust operation of the processor in the high-RF-noise environment typical of cochlear implant systems.

Algorithms↗

PubMed2002

Scalable hybrid computation with spikes.

We outline a hybrid analog-digital scheme for computing with three important features that enable it to scale to systems of large complexity: First, like digital computation, which uses several one-bit precise logical units to collectively compute a precise answer to a computation, the hybrid scheme uses several moderate-precision analog units to collectively compute a precise answer to a computation. Second, frequent discrete signal restoration of the analog information prevents analog noise and offset from degrading the computation. And, third, a state machine enables complex computations to be created using a sequence of elementary computations. A natural choice for implementing this hybrid scheme is one based on spikes because spike-count codes are digital, while spike-time codes are analog. We illustrate how spikes afford easy ways to implement all three components of scalable hybrid computation. First, as an important example of distributed analog computation, we show how spikes can create a distributed modular representation of an analog number by implementing digital carry interactions between spiking analog neurons. Second, we show how signal restoration may be performed by recursive spike-count quantization of spike-time codes. And, third, we use spikes from an analog dynamical system to trigger state transitions in a digital dynamical system, which reconfigures the analog dynamical system using a binary control vector; such feedback interactions between analog and digital dynamical systems create a hybrid state machine (HSM). The HSM extends and expands the concept of a digital finite-state-machine to the hybrid domain. We present experimental data from a two-neuron HSM on a chip that implements error-correcting analog-to-digital conversion with the concurrent use of spike-time and spike-count codes. We also present experimental data from silicon circuits that implement HSM-based pattern recognition using spike-time synchrony. We outline how HSMs may be used to perform learning, vector quantization, spike pattern recognition and generation, and how they may be reconfigured.

Action Potentials↗